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UVM RAL model global declaration and built-in defines
The UVM RAL model defines certain types, enum, and defines globally.
RAL Model Defines
Defines |
Description |
`UVM_REG_ADDR_WIDTH |
Maximum address width (in bits) Default value = 64 Used to define the uvm_reg_addr_t type |
`UVM_REG_DATA_WIDTH |
Maximum data width (in bits) Default value = 64 Used to define the uvm_reg_data_t type |
`UVM_REG_BYTENABLE_WIDTH |
The maximum number of byte enable bits Default value = one per byte in `UVM_REG_DATA_WIDTH Used to define the uvm_reg_byte_en_t type |
`UVM_REG_CVR_WIDTH |
The maximum number of bits in a uvm_reg_cvr_t coverage model set. Default value = 32 |
RAL Model Types
Types |
Description |
uvm_reg_addr_t |
2-state address value with `UVM_REG_ADDR_WIDTH bits |
uvm_reg_addr_logic_t |
4-state address value with `UVM_REG_ADDR_WIDTH bits |
uvm_reg_data_t |
2-state data value with `UVM_REG_DATA_WIDTH bits uvm_reg_data_logic_t |
uvm_reg_data_logic_t |
4-state data value with `UVM_REG_DATA_WIDTH bits |
uvm_reg_byte_en_t |
2-state byte_enable value with `UVM_REG_BYTENABLE_WIDTH bits |
uvm_reg_cvr_t |
Coverage model value set with `UVM_REG_CVR_WIDTH bits. |
uvm_hdl_path_slice |
Slice of an HDL path |
RAL Model Enumerations
Enumerations |
Description |
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uvm_status_e |
Return status for register operations
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uvm_path_e |
Path used for register operation
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uvm_check_e |
Read-only or read-and-check
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uvm_access_e |
Type of operation begin performed
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uvm_predict_e |
How the mirror is to be updated
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Note: Please refer to the UVM class reference manual to see all enumerations in the UVM RAL model.
RAL Tutorials