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Let’s understand the two APB phases first.

  1. Setup phase means “present the transfer.” The Requester selects one Completer and places the request information on the bus. Here PSELx is HIGH and PENABLE is LOW.
  2. Access phase means “complete the transfer, or wait.” The Requester asserts PENABLE while keeping PSELx HIGH and holding the request stable. The Completer uses PREADY to either complete the transfer or extend it.

So, Setup is the prepare/select cycle. Access is the handshake cycle. The Setup phase always lasts exactly one clock cycle. The Access phase lasts one or more clock cycles, depending on PREADY.

All transfer signals are sampled on the rising edge of PCLK. The sequence is:

  1. In the Setup cycle, the Requester asserts PSELx.
  2. Address, direction, and write-side information are made valid during Setup.
  3. On the next clock edge, the transfer moves to Access and PENABLE goes HIGH.
  4. If PREADY is LOW, Access continues and the Requester keeps the active transfer stable.
  5. If PREADY is HIGH, the transfer completes on that Access cycle.
  6. After completion, PENABLE is deasserted. PSELx is also deasserted if there is no next transfer to the same Completer.

If another transfer follows, APB still goes through a new Setup cycle with PENABLE LOW.

Setup phase signals

During Setup, the Requester selects the Completer and drives the write transfer information: address, direction, write data, and any implemented write attributes.

Typical Setup phase values for a write transfer:

SignalValue/meaning
PSELxHIGH for the selected Completer
PENABLELOW
PADDRValid address
PWRITETransfer direction
PWDATAValid for writes
PSTRBValid for writes if present
PPROT, user fieldsValid if implemented

 

Access phase signals

During Access, PENABLE is asserted. The selected Completer can complete the transfer by asserting PREADY. If the Completer drives PREADY LOW, the Access phase is extended.

Typical Access phase values for a write transfer:

SignalValue/meaning
PSELxRemains HIGH
PENABLEHIGH
PREADYLOW to wait, HIGH to complete
PSLVERRValid at completion if implemented

The key APB rule is stability. Once a transfer enters Access, the address/control information must remain stable until the transfer completes.

For reads, the same Setup and Access structure is used, but PWRITE is LOW and the Completer returns PRDATA only when the read transfer completes.