Basic Level Projects offer a foundational understanding of digital design, while Intermediate Level Projects explore advanced concepts further. Difficult Level Projects present complex challenges, pushing the boundaries of innovation in digital systems. Testbenches can be written in Verilog, SystemVerilog, or UVM, but utilizing UVM is recommended for comprehensive understanding.

Basic Level Projects

Finite State Machine (FSM) Design

Develop a finite state machine for a specific application, such as a vending machine using Verilog. Simulate the FSM’s behavior under various input scenarios to ensure proper functionality.

1X3 Router

Create a Verilog module for a 1X3 router, enabling data routing from one input to three outputs. Implement logic for directing incoming data to one of the three output ports based on control signals, facilitating versatile data transmission in digital systems.

ALU (Arithmetic Logic Unit)

Develop verilog based simple ALU that performs operations like addition, subtraction, AND, OR, and XOR. Explore more complex arithmetic and logic operations.

Traffic Light Controller Design

Create a digital traffic light controller for an intersection using Verilog. Implement the control logic for the traffic lights, handle timing constraints, and simulate the system’s behavior.

UART Implementation

Design and implement a UART (Universal Asynchronous Receiver-Transmitter) transmitter and receiver using Verilog. This involves creating and simulating the UART protocol, developing the necessary logic for the transmitter and receiver, and verifying functionality through test cases.

SPI Controller Design

Develop verilog-based SPI (Serial Peripheral Interface) controller. This project involves implementing the SPI protocol, including both master and slave functionalities, and verifying device communication through simulation.

PWM Generator Design

Implement verilog logic for generating PWM (Pulse Width Modulation) signals, control the duty cycle and frequency, and verify the output waveform using simulation.

Seven-Segment LED Display Controller

Design a Verilog module to control a seven-segment display by converting binary-coded decimal (BCD) inputs into the corresponding segment activations for displaying digits (0-9). Implement multiplexing for multiple digits and ensure proper timing control to create a seamless display.

Intermediate Level Projects

Booth Multiplier

Implement a Booth multiplier for faster multiplication compared to a basic array multiplier.

Barrel Shifter

Design a barrel shifter for efficient shifting operations.

Divider (Unsigned/Signed)

Create a divider circuit for both unsigned and signed numbers.

I2C Master/Slave Design

Implement an I2C (Inter-Integrated Circuit) master and slave using Verilog. Design the I2C protocol, implement read and write operations, and verify communication between devices through simulation.

AXI-to-APB-Bridge

Design a Verilog code for an AXI-to-APB Bridge, enabling seamless translation between AXI and APB protocols. This module facilitates efficient communication between high-speed processors and slower peripherals in digital systems.

Dual-Port RAM Design

Design a Verilog module for a dual-port RAM, allowing simultaneous read and write operations on two separate ports with independent addresses. Implement collision detection and handling mechanisms to ensure data integrity during concurrent access.

Difficult Level Projects

Processor Design

Create a basic custom processor using Verilog. This project includes defining an instruction set architecture (ISA) and implementing essential arithmetic and logic operations. Simulate to execute operations on the processor.

Pipelined Processor Design

Implement a pipelined processor to improve instruction throughput. Explore concepts like pipeline stages, hazards, and forwarding.

Digital Filter Design

Implement a digital filter, such as an FIR or IIR filter. Design the filter coefficients, implement the filter logic, and verify performance by applying input signals and analyzing the output.

Digital Signal Processor (DSP) Design

Create a DSP for real-time audio processing, implementing filters and transforms. Explore advanced digital signal processing algorithms and their hardware implementation.

Ethernet MAC Controller

Design a Media Access Control (MAC) layer for Ethernet communication, including frame transmission and reception.

Cryptographic Accelerator

Create a hardware accelerator for cryptographic algorithms such as AES or RSA, focusing on high throughput and security.

Encryption/Decryption engine for SHA1/SHA-256

Develop a Verilog module for an encryption/decryption engine supporting SHA-1/SHA-256 hashing algorithms, enabling secure data processing and cryptographic operations in digital systems. Implement efficient bit manipulation and algorithmic logic to ensure robust encryption and decryption functionalities.