Scope Resolution Operator in SV
The scope resolution operator is used to refer a static class member without its handle.
Symbol of scope resolution operator – ::
The scope resolution operator provides:
- Access to static members (methods and class properties), enumerations, type declaration from outside the class hierarchy.
- The derived classes can access public or protected class members of their base class.
- Access to type declarations and enumeration named constants declared inside the class from outside the class hierarchy or from within derived classes.
Accessing automatic class members (class properties and methods) has an illegal scope of access.
Scope Resolution Operator Example
class transaction; bit [31:0] data; static int id; static function disp(int id); $display("Value of id = %0h", id); endfunction function auto_disp(int id); $display("Value of id = %0h", id); endfunction endclass module class_example; initial begin transaction::id = 5; transaction::disp(transaction::id); //transaction::data = 2; // illegal //transaction::auto_disp(transaction::id); // illegal end endmodule
Value of id = 5
A scope resolution operator can also be used to access package members. Please refer to Package in SystemVerilog.
System Verilog Tutorials